(492f) Polymer Collars in All-Copper Chip-to-Substrate Connections | AIChE

(492f) Polymer Collars in All-Copper Chip-to-Substrate Connections

Authors 

Osborn, T. - Presenter, Georgia Institute of Technology
Lightsey, C. - Presenter, Georgia Institute of Technology
Kohl, P. A. - Presenter, Georgia Institute of Technology


A copper-to-copper bonding process was developed for an all-copper, chip-to-substrate interconnect technology. Copper pillars were fabricated by electroplating inside polymer molds. The chip-to-substrate, all-copper connections were formed by joining the two pillars with an electroless copper plating and low temperature anneal process. Excellent bond strength of the electrolessly joined pillars was achieved with a 180°C anneal. The bond strength of the copper pillar interconnects exceeded 165 MPa. The process was also characterized to have capabilities to compensate for planar and height mismatches between chip and substrate. Planar misalignment greater than the pillar diameter was overcome and successful bonded between pillars was achieved. A height mismatch of 65 µm or less between the pillars was compensated for in the joining process. Successful bonding between silicon and FR-4 has also been acheived.

The structures were modeled to assess the design space available for the compliant, all-copper chip-to-copper connections. The criteria includes thermo-mechanical compliance and acceptable electrical performance. The results show that there is an available design space (height, diameter) for the all-copper interconnects that satisfy mechanical compliance and maintain low-level electrical parasitics (inductance and capacitance).