(154f) Microfluidic Pneumatic Logic Circuits and Digital Pneumatic Microprocessors

We present pneumatic logic circuits and microprocessors built with microfluidic channels and valves in polydimethylsiloxane (PDMS). The pneumatic logic circuits perform various combinational and sequential logic calculations with binary pneumatic signals (atmosphere and vacuum), producing cascadable outputs based on Boolean operations. Digital pneumatic microprocessors have been constructed from combinations and cascades of various logic circuits. It receives pneumatically encoded serial command data at a single input line, decodes the temporal command sequence by spatial parallelization, computes necessary logic calculations between parallelized command bits, stores command information for signal transportation and maintenance, and finally executes the command for the target devices by directly administering multiple valves, pumps, channels, and chambers, independently and individually.

Many microfluidic applications typically require the integration of a number of valves, pumps, and other active components, most of which require auxiliary off-chip control. Although recent advances in pneumatic microvalves [1] have enabled large-scale integration of microfluidic components to perform hundreds of operations in parallel by multiplexing control of embedded operational valves [1-4], the need for a large number of dedicated external control lines limits the practical use of integrated microfluidic systems. The complex valve control can be simplified by integrating microfluidic devices using on-chip fluidic logic networks [5], considerably reducing the number of required off-chip controllers. Although conceptually powerful, most of the developed microfluidic logic gates rely on different input/output types [6-8] and, therefore, the output cannot be used as an input to directly actuate subsequent logic gates. This non-cascadable nature inhibits further scaling and feedback routing for more complex circuits. Most importantly, no parallel operations have been achieved from programmable serial input signals.

Fig. 1 shows a schematic of the experimental setup with a pneumatic microprocessor platform for a target device that requires a number of individual control lines. The pneumatic circuits operate based on the pneumatic Boolean rules (0 and 1). Two distinct pressure levels are used for the binary information: atmospheric pressure (bit value = 0) and vacuum (bit value = 1). The fundamental building unit in our system is the asymmetric microfluidic inverter or NOT gate (Fig. 2). It consists of a long microfluidic channel connected to vacuum and atmosphere at the ends, respectively, and employs a channel-separating microvalve that is normally closed at an atmospheric pressure but opens with a vacuum input [2]. While open holes to atmosphere allow for infinite supply of atmospheric pressure, vacuum can be also supplied to all circuits simultaneously from one large vacuum reservoir constructed in the third PDMS layer without separate individual tubing. On the analogy with electronics, this inverter is "powered" by the vacuum source connected to one end and "grounded" to atmosphere at the other end. Application of vacuum causes the input microvalve to open, resulting in a sharp pressure increase in the "output" chamber. For atmospheric input signals, the input valve is closed and the output chamber returns to a vacuum state. With simple modifications of the asymmetric inverter, NOR gates and NAND gates were constructed. Furthermore, with these cascadable universal gates along with the inverter, all sorts of logic gates were constructed including AND, OR, XOR, and XNOR.

Such pneumatic logic gates comprise the building blocks for advanced circuits. Pneumatic bistable flip-flops, essential elements of microfluidic memory devices, were built from two regular inverters with each output fed backed to the other input. Both flip-flop valves maintain their states persistently, remaining 'latched' in the absence of external perturbation. Pneumatic D Latches with both inverted output and buffered output can be constructed from these bistable flip-flops and further extended to clocked D flip-flops. Such flip-flops are then joint together to form multi-bit micropneumatic shift registers that perform serial-in parallel-out operations with pneumatic data. With n D flip-flops concatenated, n+1 bits of information are available at the parallel outputs. Fig. 3 shows a 4-bit pneumatic processor capable of parallelizing serial input data to control four individual valves independently to, in this case, mix four different color dyes. Such individually accessible valves were also used for multiplexing eight different flow channels using a 3-1 multiplexer. Instead of using separate trigger (command execution) signals to initiate signal transfer from shift registers to instruction registers, the processor can detect a termination code in the original serial input to execute commands. A pneumatic clock pulse generator was also embedded to eliminate the need for external solenoid clocking.

Such pneumatic microprocessors will function as a universal on-chip control platform to perform complex parallel operations for large-scale integrated microfluidic devices that require a roomful of control components. The miniaturization and on-chip integration of control elements has thus the great potential to significantly reduce the complexity of external controllers, interconnections and auxiliary equipment. Proposed digital pneumatic microprocessors can be a potent universal on-chip platform to autonomously manipulate microfluids in a high throughput manner. There is no theoretical limit to the number of target parallel outputs although physical limitations will certainly exist. Consequently, the pneumatic logic circuits and microprocessors are universal, operable with ease, and portable; they can thus significantly minimize cumbersome control, power consumption, and auxiliary external cost, making microfluidic analysis devices more accessible for various complicated applications, even at remote sites.

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Figure 1. A schematic of the experimental setup with a pneumatic microprocessor embedded in a target microfluidic device. The microprocessor connected to the vacuum reservoir receives serially-encoded pneumatic commands from a single input line, parallelizes the command using various logic circuits, and transfers the decoded commands into multiple on-chip control lines for the application in the target device.   

Figure 2. Electrical representation and operations of the asymmetric pneumatic inverter, NOT gate. (a) When the valve is closed (switch open), the main channel becomes discontinued, making vacuum-side channel a closed system. Vacuum will be transferred to the output without pressure drop. (b) When the valve is open (switch closed), the main channel becomes connected, generating pressure drop along the channel. Since most of the resistance exists at the vacuum-side, the output becomes close to atmospheric pressure. although it is not collapsed due to thicker channel wall, the vacuum-side channel maintains the same pressure level of 1 (vacuum) as the output. Inter-layer connection bridges the main flow channel in the upper layer and the valve control channel in the bottom layer.

Figure 3. 4-bit digital pneumatic microprocessor. (a) CAD design of the 4-bit processor consisting of a shift register with three D flip-flops and a 4-bit instruction registers that controls the target mixing device with four independent valves. It takes serially encoded input command along accompanying clock pulses, generating four independent parallel outputs to control the corresponding command valves in the target device. (b) Statuses of four target command valves depending on the input commands. (c) Various command sequences were supplied to perform different mixing tasks. Note that the maintained outputs keep some valves open and the others closed.