(253ap) Atomistic Picture of the Growth Mechanism of Silicene Monolayers | AIChE

(253ap) Atomistic Picture of the Growth Mechanism of Silicene Monolayers

Authors 

Cherukara, M. - Presenter, Argonne National Lab
Narayanan, B., Argonne National Lab
Harder, R., Argonne National Lab
Sankaranarayanan, S. K. R. S., Harvard University
Silicene, the Si based counterpart to graphene is predicted to demonstrate similar desirable features to graphene, possessing a Dirac cone in the band-structure and Fermi velocities comparable to graphene. Silicene has also been predicted to demonstrate several exotic properties such as the quantum spin Hall effect, chiral superconductivity and giant magnetoresistance. Furthermore, it has the benefit of being easy to integrate into current industrial device engineering processes. Silicene monolayers have been grown on Ag (111) and Ir (111) substrates and recently a working field-effect transistor has been demonstrated at room temperature. While it is possible to characterize the final monolayer structure, it is impossible to probe experimentally the evolving atomic structure during growth. We use large-scale molecular dynamics (MD) simulations to study the growth of silicene monolayers on Ag (111) and Ir (111) surfaces. Initially, individual Si atoms aggregate to form small clusters containing 3-6 Si atoms with different ring geometries. Over time, these rings merge to form larger clusters, but containing extended line defects and grain structures. Interestingly, structures grown on the Ag surface are prone to more defects, in particular extended regions of sub-surface growth, while the structures grown on Ir are relatively defect free. We also explore the effect of different growth conditions such as temperature and deposition flux on the structure of the monolayers. Finally, we study the mechanical and thermal properties of these in-silico grown monolayers and compare their performance to previously reported data for ideal structures. The processing-structure-property correlations we draw will enable experimental processes to be tailored to obtain target device properties.